1. Field of the Invention
The invention relates to digital processors and more specifically an interface circuit for coupling a digital processor utilizing an N bit data word to a core memory having a data word length of 2 N bits.
2. Description of the Prior Art
The need for interfacing digital processors with memories having different word lengths has existed for some time. The most common technique for accomplishing such an interface, particularly in circumstances where the digital processor utilized a data word having N bits and the memory utilized a data word length 2 N bits was to interface the memory with the processor through a logic circuit which caused each data word of the memory to appear as two data words to the digital processor. This technique permitted the digital processor to communicate directly with the memory without any need for special programming.